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Lab5 - Four way set associative cache

Implement the hit and read logic of a 4-way set-associative cache as in figure 5.18 page 408. Given the coplexity, this lab is split in two parts.

  • book

    Part 1 - Due Thursday Oct 31

    Implement one block as a subcircuit.
    • Inputs:
      1. Index: 8-bit input that selects one of the 256 memory locations for: data, tag and valid bit
      2. Tag: 22-bit used to check if the requested address is in cache
      3. DI: 32-bit data input to be stored in memory
    • Outputs:
      1. Hit: 1-bit if 1 then the requested index is in this block, otherwise 0
      2. DO(data out): 32-bit data corresponding to the hit
    • Steps:
      1. Create a new project in Circuitverse called 4-way set associative cache
      2. Create a new subcircuit named SetBlock
      3. Choose the memory block for the 3 data types you need to store: V, Tag and Data. The simplest is a RAM block. Make sure to select the proper bit width for each data type and the address from the input
      4. Implement the compare between the selected Tag and the input Tag as a new sub-circuit named Compare
        • Inputs:
          1. A: 22-bit input
          2. B: 22-bit input
        • Outputs:
          1. EQ: 1-bit, 1 if A = B 0 otherwise

        Notes:

        1. Use the split block to split the 22-bit result of bit by bit comparison into 22 distinct lines that you can merge into 1-bit line for the output (using a 22 inputs gate)
          Select 22 as width and then type 1 1 1 (22 time with space). See Full splitter documentation
      5. Add a Compare sub-circuit into SetBlock by selecting "Insert SubCircuit" from the context menu (right click).
        The result of the compare block will be connected with the Hit output of the SetBlock sub-circuit
      6. Save the project along with all the subcircuits
      7. Submit the screenshoot of both diagrams: SetBlock and Compare
  • book

    Part 2 - Due November 4

    Implement cache using the block from part 1.
    • Inputs:
      1. Address: 32-bit memory address
      2. DI: 32-bit data input to be stored in memory
    • Outputs:
      1. Hit: 1-bit if 1 then the requested address is in cache, otherwise 0
      2. DO(data out): 32-bit data corresponding to the hit
    • Steps:
      1. Open the project created in part 1 Circuitverse
      2. Create a new subcircuit named 4 to 1 Multiplexor
        • Inputs:
          1. D1: 32-bit data input from block1
          2. D2: 32-bit data input from block2
          3. D3: 32-bit data input from block3
          4. D4: 32-bit data input from block4
          5. S1: 1-bit hit input from block1
          6. S2: 1-bit hit input from block2
          7. S3: 1-bit hit input from block3
          8. S4: 1-bit hit input from block4
        • Outputs:
          1. DO: 32-bit data output

        Notes:

        1. Use Priority encoder to encode the 4 hit inputs into the 2-bit selector input of a Multoplexor. See Priority Encoderr documentation
      3. Add four SetBlock sub-circuits into Main
      4. Add 4 to 1 Multiplexor sub-circuit into Main
      5. Save the project along with all the subcircuits
      6. Submit the screenshoot of both diagrams: Main and 4 to 1 Multiplexor