For this assignment you will create a circuit in Logisim which can add two 2-bit numbers together to produce a sum and the carry.
In class we saw how to make a half adder. This takes two bits and produces the sum and the carry, and can be done with an AND gate and an XOR gate. A full adder has a third bit as input, which is the carry from a previous addition. Both of these are discussed in the book in section 3.2 (which is the assigned reading).
To add two 2-bit numbers, the two least significant bits can be added with a half adder. The sum output of the half adder is the least significant bit of the sum of the two 2-bit numbers. The carry output of the half adder can then be used as the carry input of a full adder, which adds together the two most significant bits of the two numbers to produce the most significant bit of the result, along with the carry.
So say we want to perform this addition:
10
+ 11
The result is 101
, but typically when you add two numbers with a fixed width,
the result is stored with the same number of bits. So the result here is 10
with a carry of 1
.
We’ll use to refer to the least significant bit of the number , and to refer to the most significant bit. We’ll call the first number , the second number , the sum , and the carry bit .
So your circuit will have 4 input bits: , , , and . and are the inputs for the half adder, the inputs for the full adder are , , and the carry output from the half adder. The final outputs are , , and the carry bit .
Logisim has adders built in, but for this assignment you must build the adders yourselves using gates.
Label your inputs and outputs using the text tool. Call them “a0”, “a1”, etc.
Save your circuit as a Logism project file, add it to the repository you cloned from git-keeper, and push your submission.
For full credit your circuit must correctly add the two numbers using gates, and the four input bits and the three output bits must be labeled correctly.